Invention Grant
- Patent Title: Two channel computer bus architecture
- Patent Title (中): 双通道计算机总线架构
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Application No.: US11040530Application Date: 2005-01-21
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Publication No.: US07739425B2Publication Date: 2010-06-15
- Inventor: Jinsoo Kim
- Applicant: Jinsoo Kim
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM, Incorporated
- Current Assignee: QUALCOMM, Incorporated
- Current Assignee Address: US CA San Diego
- Agent William M. Hooks
- Main IPC: G06F13/00
- IPC: G06F13/00 ; G06F13/372 ; G06F13/36 ; G06F15/173 ; H04L12/28 ; H04J3/26 ; H04J3/16

Abstract:
Various methods and processing systems are disclosed which include sending and receiving components communicating over a bus having first and second channels. The sending component may broadcast on the first channel a plurality of read and write address locations, a plurality of transfer qualifiers, and write data. The receiving component may store the write data broadcast on the first channel at the receiving component based on the write address locations and a first portion of the transfer qualifiers. The receiving component may also retrieve read data from the receiving component based on the read address locations and a second portion of the transfer qualifiers, and broadcast the retrieved read data on the second channel.
Public/Granted literature
- US20050198416A1 Two channel bus structure to support address information, data, and transfer qualifiers Public/Granted day:2005-09-08
Information query