Invention Grant
- Patent Title: Semiconductor integrated circuit
- Patent Title (中): 半导体集成电路
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Application No.: US11291781Application Date: 2005-12-02
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Publication No.: US07739430B2Publication Date: 2010-06-15
- Inventor: Keiichi Tsumura
- Applicant: Keiichi Tsumura
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JPP2004-349920 20041202
- Main IPC: G06F13/12
- IPC: G06F13/12

Abstract:
A semiconductor integrated circuit provided with an (m×n)-bit output mode and an n-bit output mode and including a set of (m×n) I/O portions 103 for outputting signals to the outside, wherein data with a bus width of (m×n) bits are selected by a set of selectors 101 in the (m×n)-bit output mode so that the data with the bus width of (m×n) bits are outputted from the set of (m×n) I/O portions 103 whereas data with a bus width of n bits are multiply selected by the set of selectors 101 in the n-bit output mode so that the data with the bus width of n bits are outputted from the set of (m×n) I/O portions 103 while multiplexed in at least two I/O portions per bit. Every I/O portions which output one and the same bit are short-circuited externally to improve current drive capacity.
Public/Granted literature
- US20060120169A1 Semiconductor integrated circuit Public/Granted day:2006-06-08
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