Invention Grant
- Patent Title: Wake-up circuit
- Patent Title (中): 唤醒电路
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Application No.: US11864923Application Date: 2007-09-29
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Publication No.: US07746135B2Publication Date: 2010-06-29
- Inventor: Jacob S. Schneider , Navneet Dour , Harishankar Sridharan
- Applicant: Jacob S. Schneider , Navneet Dour , Harishankar Sridharan
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agent Erik R. Nordstrom
- Main IPC: H03L7/06
- IPC: H03L7/06

Abstract:
Disclosed herein is a wake-up circuit for a bias input of a circuit such as a slave DLL circuit, to allow it to be placed in a reduced power mode and be “awoken” (brought up to a control bias level) in a sufficiently small enough amount of time. The wake-up circuit couples a bias input node to a voltage level that is higher then the control bias level in response to a wake-up event, and then it couples the control bias node to the bias input node in response to their voltage levels being sufficiently close to one another.
Public/Granted literature
- US20090085618A1 WAKE-UP CIRCUIT Public/Granted day:2009-04-02
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