Invention Grant
US07746146B2 Junction field effect transistor input buffer level shifting circuit
有权
结场效应晶体管输入缓冲电平移位电路
- Patent Title: Junction field effect transistor input buffer level shifting circuit
- Patent Title (中): 结场效应晶体管输入缓冲电平移位电路
-
Application No.: US11515252Application Date: 2006-09-01
-
Publication No.: US07746146B2Publication Date: 2010-06-29
- Inventor: Richard K. Chou , Damodar R. Thummalapally
- Applicant: Richard K. Chou , Damodar R. Thummalapally
- Applicant Address: US CA Los Gatos
- Assignee: SuVolta, Inc.
- Current Assignee: SuVolta, Inc.
- Current Assignee Address: US CA Los Gatos
- Agent Darryl G. Walker
- Main IPC: H03L5/00
- IPC: H03L5/00

Abstract:
A level shifting circuit can include a first input junction field effect transistor (JFET) having a gate coupled to receive an input signal having a first voltage swing that provides a controllable impedance path between a first supply node and a first terminal of a first bias stack including at least one JFET. A driver circuit can be coupled to receive an output from the first bias stack that provides a level shifted output having a second voltage swing that is less than the first voltage swing.
Public/Granted literature
- US20080042723A1 Junction field effect transistor input buffer level shifting circuit Public/Granted day:2008-02-21
Information query