Invention Grant
US07746257B2 Delta-sigma analog-to-digital converter circuit having reduced sampled reference noise
有权
具有降低的采样参考噪声的Δ-Σ模数转换器电路
- Patent Title: Delta-sigma analog-to-digital converter circuit having reduced sampled reference noise
- Patent Title (中): 具有降低的采样参考噪声的Δ-Σ模数转换器电路
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Application No.: US12366214Application Date: 2009-02-05
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Publication No.: US07746257B2Publication Date: 2010-06-29
- Inventor: Edmund M. Schneider , Eric J. Swanson , John L. Melanson
- Applicant: Edmund M. Schneider , Eric J. Swanson , John L. Melanson
- Applicant Address: US TX Austin
- Assignee: Cirrus Logic, Inc.
- Current Assignee: Cirrus Logic, Inc.
- Current Assignee Address: US TX Austin
- Agency: Mitch Harris, Atty at Law, LLC
- Agent Andrew M. Harris
- Main IPC: H03M3/00
- IPC: H03M3/00
Abstract:
A delta-sigma analog-to-digital converter (ADC) circuit improves performance by reducing the amount of noise and other error sampled by the reference switching circuit. The reference switching network is operated intermittently only when the charge on an input integrator exceeds a threshold, thereby preventing the input integrator from saturating, while avoiding needlessly injecting reference noise. The input to the ADC may be a current injected directly into a summing node of the integrator, or may be a voltage supplied through another switching network.
Public/Granted literature
- US20090278720A1 DELTA-SIGMA ANALOG-TO-DIGITAL CONVERTER CIRCUIT HAVING REDUCED SAMPLED REFERENCE NOISE Public/Granted day:2009-11-12
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