Invention Grant
- Patent Title: High coupling memory cell
- Patent Title (中): 高耦合存储单元
-
Application No.: US11486618Application Date: 2006-07-14
-
Publication No.: US07749837B2Publication Date: 2010-07-06
- Inventor: Sukesh Sandhu , Gurtej S. Sandhu
- Applicant: Sukesh Sandhu , Gurtej S. Sandhu
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Leffert Jay & Polglaze, P.A.
- Main IPC: H01L21/336
- IPC: H01L21/336
Abstract:
A first dielectric layer is formed over a substrate. A single layer first conductive layer that acts as a floating gate is formed over the first dielectric layer. A trough is formed in the first conductive layer to increase the capacitive coupling of the floating gate with a control gate. An intergate dielectric layer is formed over the floating gate layer. A second conductive layer is formed over the second dielectric layer to act as a control gate.
Public/Granted literature
- US20060258095A1 High coupling memory cell Public/Granted day:2006-11-16
Information query
IPC分类:
