Invention Grant
US07749858B2 Process for producing an MOS transistor and corresponding integrated circuit
有权
用于制造MOS晶体管和相应的集成电路的工艺
- Patent Title: Process for producing an MOS transistor and corresponding integrated circuit
- Patent Title (中): 用于制造MOS晶体管和相应的集成电路的工艺
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Application No.: US11487706Application Date: 2006-07-17
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Publication No.: US07749858B2Publication Date: 2010-07-06
- Inventor: Philippe Coronel , Claire Gallon , Claire Fenouillet-Beranger
- Applicant: Philippe Coronel , Claire Gallon , Claire Fenouillet-Beranger
- Applicant Address: FR Crolles FR Paris
- Assignee: STMicroelectronics (Crolles 2) SAS,Commisssariat a l'Energie Atomique
- Current Assignee: STMicroelectronics (Crolles 2) SAS,Commisssariat a l'Energie Atomique
- Current Assignee Address: FR Crolles FR Paris
- Agency: Gardere Wynne Sewell LLP
- Priority: FR0507598 20050718
- Main IPC: H01L21/76
- IPC: H01L21/76

Abstract:
A silicon substrate (SOI) is placed on a buried oxide layer (BOX). An MOS transistor is produced in an active zone of the substrate which is defined by an isolating region. A gate region and source and drain regions, which between them define a channel, are produced so that the gate region extends above the channel. The isolating region is produced by localized formation of a zone of material that can be selectively etched with respect to silicon. That material is selectively etched, and a dielectric material is deposited in the etched feature. The etching is carried out after the gate region has been produced.
Public/Granted literature
- US20070037324A1 Process for producing an MOS transistor and corresponding integrated circuit Public/Granted day:2007-02-15
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