Invention Grant
- Patent Title: Vertical junction field effect transistors, and methods of producing the vertical junction field effect transistors
- Patent Title (中): 垂直结场效应晶体管,以及垂直结型场效应晶体管的制造方法
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Application No.: US11770414Application Date: 2007-06-28
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Publication No.: US07750377B2Publication Date: 2010-07-06
- Inventor: Takashi Hoshino , Shin Harada , Kazuhiro Fujikawa , Satoshi Hatsukawa , Kenichi Hirotsu
- Applicant: Takashi Hoshino , Shin Harada , Kazuhiro Fujikawa , Satoshi Hatsukawa , Kenichi Hirotsu
- Applicant Address: JP Osaka
- Assignee: Sumitomo Electric Industries, Ltd.
- Current Assignee: Sumitomo Electric Industries, Ltd.
- Current Assignee Address: JP Osaka
- Agency: Fish & Richardson P.C.
- Priority: JPP2002-215804 20020724; JPP2002-235045 20020812
- Main IPC: H01L29/80
- IPC: H01L29/80

Abstract:
A vertical JFET 1a according to the present invention has an n+ type drain semiconductor portion 2, an n-type drift semiconductor portion 3, a p+ type gate semiconductor portion 4, an n-type channel semiconductor portion 5, an n+ type source semiconductor portion 7, and a p+ type gate semiconductor portion 8. The n-type drift semiconductor portion 3 is placed on a principal surface of the n+ type drain semiconductor portion 2 and has first to fourth regions 3a to 3d extending in a direction intersecting with the principal surface. The p+ type gate semiconductor portion 4 is placed on the first to third regions 3a to 3c of the n-type drift semiconductor portion 3. The n-type channel semiconductor portion 5 is placed along the p+ type gate semiconductor portion 4 and is electrically connected to the fourth region 3d of the n-type drift semiconductor portion 3.
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