Invention Grant
- Patent Title: Semiconductor package and method for manufacturing the same
- Patent Title (中): 半导体封装及其制造方法
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Application No.: US12237639Application Date: 2008-09-25
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Publication No.: US07750448B2Publication Date: 2010-07-06
- Inventor: Shimpei Yoshioka , Naotake Watanabe
- Applicant: Shimpei Yoshioka , Naotake Watanabe
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2007-250134 20070926
- Main IPC: H01L23/495
- IPC: H01L23/495

Abstract:
A semiconductor package includes a semiconductor device having a first main surface and a second main surface, a first electrode plate provided on the first main surface, a second electrode plate provided on the second main surface, and a wiring substrate provided between the semiconductor device and the first electrode plate, in which a plurality of opening portions in the side surface of a protruding portion provided on the first electrode plate are engaged respectively with a plurality of engaging portions which face the opening portions and which are provided on the inner side surface of an intrusion opening portion in the wiring substrate into which the protruding portion is intruded.
Public/Granted literature
- US20090079046A1 SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME Public/Granted day:2009-03-26
Information query
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