Invention Grant
US07750683B2 Phase/frequency detector 有权
相位/频率检测器

Phase/frequency detector
Abstract:
PFD includes UP and DOWN signal modules, and RESET signal module. UP and DOWN signal modules transmit UP and DOWN signals according to reference and fed-back clock signals. RESET module includes UP-RESET and DOWN-RESET signal modules. UP-RESET signal module resets UP signal module according to pre-trigger fed-back signal, UP and DOWN signals. Pre-trigger fed-back signal is generated according to original fed-back clock signal and calculation of logic gates and inverting delay module. DOWN-RESET signal module resets DOWN signal module according to pre-trigger reference signal, UP and DOWN signals. Pre-trigger reference signal is generated according to original reference clock signal and calculation of logic gates and inverting delay module.
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