Invention Grant
- Patent Title: Dielectric relaxation memory
- Patent Title (中): 介质松弛记忆
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Application No.: US12289692Application Date: 2008-10-31
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Publication No.: US07751228B2Publication Date: 2010-07-06
- Inventor: Cem Basceri , Gurtej Sandhu
- Applicant: Cem Basceri , Gurtej Sandhu
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dickstein Shapiro LLP
- Main IPC: G11C11/24
- IPC: G11C11/24 ; G11C7/06 ; G11C7/00

Abstract:
A capacitor structure having a dielectric layer disposed between two conductive electrodes, wherein the dielectric layer contains at least one charge trap site corresponding to a specific energy state. The energy states may be used to distinguish memory states for the capacitor structure, allowing the invention to be used as a memory device. A method of forming the trap cites involves an atomic layer deposition of a material at pre-determined areas in the dielectric layer.
Public/Granted literature
- US20090127656A1 Dielectric relaxation memory Public/Granted day:2009-05-21
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