Invention Grant
US07751245B2 Programming sequence in NAND memory 有权
NAND存储器中的编程顺序

Programming sequence in NAND memory
Abstract:
An analog voltage NAND architecture non-volatile memory device and programming process is described that reduce the effects of NAND string resistance in source follower sensing by programming the cells in NAND memory cell strings to maintain the resistance presented by the unselected cells on the source-side of a given selected memory cell of the NAND string during both the verify and read. In particular, in one embodiment of the present invention, the cells in the NAND string are programmed sequentially in order from the cells closest the bit line to the final cell that is closest the source line in the string. This allows the source follower sensing of the verify and later read operations to read the programmed threshold voltage across the same stable source-side resistance 602, as the source-side unselected memory cells 20831-208N+1 will already have been programmed and thus will present the same channel resistance to both the source follower verify of the program operation and following source follower read operations, maintaining the compensation for the source-side resistance 602 of the source-side unselected memory cells 20831-208N+1.
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