Invention Grant
- Patent Title: Extended synchronized clock
- Patent Title (中): 扩展同步时钟
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Application No.: US11516165Application Date: 2006-09-05
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Publication No.: US07751274B2Publication Date: 2010-07-06
- Inventor: Navneet Dour , Joe H. Salmon
- Applicant: Navneet Dour , Joe H. Salmon
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agent Erik R. Nordstrom
- Main IPC: G11C8/00
- IPC: G11C8/00

Abstract:
Some embodiments are directed to circuits comprising first and second PLLs. The first PLL generates a first clock signal based on a reference clock signal. The second PLL generates a second clock signal based on the reference clock signal and is synchronized with the first clock signal.
Public/Granted literature
- US20080065922A1 Extended synchronized clock Public/Granted day:2008-03-13
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