Invention Grant
- Patent Title: Capacitance measurement method employing floating gate of semiconductor device
- Patent Title (中): 采用半导体器件浮栅的电容测量方法
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Application No.: US11830210Application Date: 2007-07-30
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Publication No.: US07751995B2Publication Date: 2010-07-06
- Inventor: Jong Min Kim
- Applicant: Jong Min Kim
- Applicant Address: KR Seoul
- Assignee: Dongbu HiTek Co., Ltd.
- Current Assignee: Dongbu HiTek Co., Ltd.
- Current Assignee Address: KR Seoul
- Agency: Lowe Hauptman Ham & Berner LLP
- Priority: KR10-2006-0083064 20060830
- Main IPC: G01R5/28
- IPC: G01R5/28

Abstract:
A capacitance measurement method employing a floating gate of a semiconductor device in a circuit having a MOSFET in which a drain is connected to a ground and a source and a gate are connected to each other, and a capacitor having a capacitance Cr connected to the gate, includes: obtaining a slope S from a relationship between voltage Vs of the source and a voltage Vf applied to the capacitor; setting a standard slope S0 as a y-intercept of a first-order linear equation obtained from a relationship between the slope S depending on the source current Is and the Vo(Is); and calculating a gate-to-drain overlap capacitance Cdgo of the MOSFET based on a capacitance Cr of the capacitor and the standard slop S0.
Public/Granted literature
- US20080059090A1 CAPACITANCE MEASUREMENT METHOD EMPLOYING FLOATING GATE OF SEMICONDUCTOR DEVICE Public/Granted day:2008-03-06
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