Invention Grant
US07752580B2 Method and system for analyzing an integrated circuit based on sample windows selected using an open deterministic sequencing technique 有权
基于使用开放确定性测序技术选择的样本窗口来分析集成电路的方法和系统

Method and system for analyzing an integrated circuit based on sample windows selected using an open deterministic sequencing technique
Abstract:
Disclosed herein are embodiments of a system and an associated method for analyzing an integrated circuit to determine the value of a particular attribute (i.e., a physical or electrical property) in that integrated circuit. In the embodiments, an open deterministic sequencing technique is used to select a sequence of points representing centers of sample windows in an integrated circuit layout. Then, the value of the particular attribute is determined for each sample window and the results are accumulated in order to infer an overall value for that particular attribute for the entire integrated circuit layout. This sequencing technique has the advantage of allowing additional sample windows to be added and/or the sizes and shapes of the windows to be varied without hindering the quality of the sample.
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