Invention Grant
US07752583B2 System for verification of digital designs using case-splitting via constrained internal signals
失效
用于通过限制内部信号通过案例分解验证数字设计的系统
- Patent Title: System for verification of digital designs using case-splitting via constrained internal signals
- Patent Title (中): 用于通过限制内部信号通过案例分解验证数字设计的系统
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Application No.: US11944956Application Date: 2007-11-26
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Publication No.: US07752583B2Publication Date: 2010-07-06
- Inventor: Jason Raymond Baumgartner , Christian Jacobi , Viresh Paruthi , Kai Oliver Weber
- Applicant: Jason Raymond Baumgartner , Christian Jacobi , Viresh Paruthi , Kai Oliver Weber
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Dillon & Yudell LLP
- Main IPC: G06F17/50
- IPC: G06F17/50 ; G06F9/45

Abstract:
A method of verifying a digital design is disclosed. The method comprises generating a reference model for a first digital design and creating an operational model for a second digital design, wherein the first digital design and the second digital design are intended to have a same logical function. A plurality of testcase types are then created by constraining one or more internal signals, and one or more test scripts representing the plurality of testcase types are produced. The method also includes verifying the second digital design with a testing simulation program by comparing results of the test scripts from the operational model and the reference model.
Public/Granted literature
- US20080077381A1 System for Verification of Digital Designs Using Case-Splitting via Constrained Internal Signals Public/Granted day:2008-03-27
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