Invention Grant
US07754513B2 Latch-up resistant semiconductor structures on hybrid substrates and methods for forming such semiconductor structures
失效
混合基板上的防起堆电阻半导体结构和形成这种半导体结构的方法
- Patent Title: Latch-up resistant semiconductor structures on hybrid substrates and methods for forming such semiconductor structures
- Patent Title (中): 混合基板上的防起堆电阻半导体结构和形成这种半导体结构的方法
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Application No.: US11680083Application Date: 2007-02-28
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Publication No.: US07754513B2Publication Date: 2010-07-13
- Inventor: Jack Allan Mandelman , William Robert Tonti
- Applicant: Jack Allan Mandelman , William Robert Tonti
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Wood, Herron & Evans, LLP
- Main IPC: H01L21/20
- IPC: H01L21/20

Abstract:
Latch-up resistant semiconductor structures formed on a hybrid substrate and methods of forming such latch-up resistant semiconductor structures. The hybrid substrate is characterized by first and second semiconductor regions that are formed on a bulk semiconductor region. The second semiconductor region is separated from the bulk semiconductor region by an insulating layer. The first semiconductor region is separated from the bulk semiconductor region by a conductive region of an opposite conductivity type from the bulk semiconductor region. The buried conductive region thereby the susceptibility of devices built using the first semiconductor region to latch-up.
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