Invention Grant
US07754980B2 Substrate with multilayer plated through hole and method for forming the multilayer plated through hole
有权
具有多层电镀通孔的基板和用于形成多层电镀通孔的方法
- Patent Title: Substrate with multilayer plated through hole and method for forming the multilayer plated through hole
- Patent Title (中): 具有多层电镀通孔的基板和用于形成多层电镀通孔的方法
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Application No.: US11620031Application Date: 2007-01-04
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Publication No.: US07754980B2Publication Date: 2010-07-13
- Inventor: Chien Hao Wang
- Applicant: Chien Hao Wang
- Applicant Address: TW
- Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee Address: TW
- Priority: TW95106584A 20060227
- Main IPC: H01R12/04
- IPC: H01R12/04 ; H05K1/11

Abstract:
A structure with a multilayer plated through hole is disclosed. At least one dielectric layer formed by deposition and a conductive layer are formed in an original plated through hole (PTH). The dielectric layer partially covers wiring layers of the substrate to electrically isolate the PTH and the conductive layer to form a multilayer PTH so as to save PTH occupation space of the substrate. Preferably, the formation of the dielectric layer is electrophoretic deposition to control the deposition thickness in the PTH very even and thin, no drilling is necessary. Accordingly, it can increase electrical performance and decrease cross-talk effect.
Public/Granted literature
- US20070199736A1 SUBSTRATE WITH MULTILAYER PLATED THROUGH HOLE AND METHOD FOR FORMING THE MULTILAYER PLATED THROUGH HOLE Public/Granted day:2007-08-30
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