Invention Grant
US07755171B2 Transistor structure with recessed source/drain and buried etch stop layer and related method
有权
具有凹陷源极/漏极和掩埋蚀刻停止层的晶体管结构及相关方法
- Patent Title: Transistor structure with recessed source/drain and buried etch stop layer and related method
- Patent Title (中): 具有凹陷源极/漏极和掩埋蚀刻停止层的晶体管结构及相关方法
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Application No.: US11459461Application Date: 2006-07-24
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Publication No.: US07755171B2Publication Date: 2010-07-13
- Inventor: Huilong Zhu
- Applicant: Huilong Zhu
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Hoffman Warnick LLC
- Agent Ian MacKinnon
- Main IPC: H01L29/06
- IPC: H01L29/06

Abstract:
A transistor structure having a recessed source/drain and buried etch stop layer (e.g., a silicon germanium layer), and a related method, are disclosed. In one embodiment, the transistor structure includes a substrate including a substantially trapezoidal silicon pedestal over an etch stop layer; a gate atop the substantially trapezoidal silicon pedestal; a source/drain region extending into tapered surfaces of the substantially trapezoidal silicon pedestal and into the etch stop layer; and a stress liner overlying the gate and the source/drain region, the stress liner imparting a stress to the source/drain region and a channel of the gate. The recessed source/drain allows recessing without contacting the P-N junction, and allows improved application of stress to the channel.
Public/Granted literature
- US20080020536A1 TRANSISTOR STRUCTURE WITH RECESSED SOURCE/DRAIN AND BURIED ETCH STOP LAYER AND RELATED METHOD Public/Granted day:2008-01-24
Information query
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