Invention Grant
US07755385B2 Method for operating an electronic device with reduced pin capacitance
有权
操作具有降低的引脚电容的电子设备的方法
- Patent Title: Method for operating an electronic device with reduced pin capacitance
- Patent Title (中): 操作具有降低的引脚电容的电子设备的方法
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Application No.: US12341043Application Date: 2008-12-22
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Publication No.: US07755385B2Publication Date: 2010-07-13
- Inventor: Raghukiran Sreeramaneni
- Applicant: Raghukiran Sreeramaneni
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agent Stephen A. Gratton
- Main IPC: H03K17/16
- IPC: H03K17/16 ; H03K19/003

Abstract:
A method of operating an electronic device having an output driver with on die termination legs ODT, and non-ODT legs, includes the step of selectively tri-stating tuning transistors (ZQ trim devices) in the legs as a function of the operational state of the output driver. The tri-stating step is performed such that when a leg is not being utilized, the tuning transistors in the unused leg are placed in a tri-state. For example, during an ODT mode of the output driver, the tuning transistors in the non-ODT legs are tri-stated. During a READ mode of the output driver, the tuning transistors in the ODT legs are tri-stated. During a HiZ mode of the output driver, the tuning transistors in both legs are tri-stated. Tri-stating the tuning transistors in the unused output driver legs can reduce DQ pin capacitance by a total of approximately (Cgd+Cgs+Cgb). A circuit for performing the method includes tri-state components in electrical communication with the tuning transistors, and logic units configured to control the tri-state components. An electronic device includes the output driver having the tri-state components in electrical communication with the logic units.
Public/Granted literature
- US20090108867A1 Method For Operating An Electronic Device With Reduced Pin Capacitance Public/Granted day:2009-04-30
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