A reference level generator for driving an analog circuit to cyclically complete an analog function includes a portion of the analog circuit, a master clock, a control circuit, a detection circuit, an integrating circuit and a reference level circuit. The master clock operates at a master clock speed and provides master clock signals to the analog circuit utilized to complete the analog function. The control circuit is used to start and stop the operation of the portion of the analog circuit. The detection circuit is configured to determine when the analog function is completed and to provide an output indicative of the completion of the analog function. The integrating circuit is driven by the output of the detection circuit and configured to set an analog level that is function of the analog function completion time. The reference level circuit utilizes the analog level set by the integrating circuit for driving the analog circuit to induce the analog circuit to complete the analog function at a desired speed.