Invention Grant
- Patent Title: Phase locked loop circuit performing two point modulation and gain calibration method thereof
- Patent Title (中): 执行两点调制和增益校准方法的锁相环电路
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Application No.: US12265395Application Date: 2008-11-05
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Publication No.: US07755439B2Publication Date: 2010-07-13
- Inventor: Hwa Yeal Yu , Dong Jin Keum
- Applicant: Hwa Yeal Yu , Dong Jin Keum
- Applicant Address: KR Suwon-Si
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-Si
- Agency: F. Chau & Associates, LLC
- Priority: KR10-2007-0112367 20071105
- Main IPC: H03C3/06
- IPC: H03C3/06 ; H03L7/00 ; H03L7/06 ; H03L7/08 ; H03L7/093 ; H03L7/18

Abstract:
A PLL circuit for two point modulation includes a first loop filter, a second loop filter, a plurality of switching devices, and a calibration module. The first loop filter filters an output voltage of a charge pump during a gain calibration operation. The second loop filter filters the output voltage of the charge pump during a normal operation. The first loop filter has a bandwidth wider than that of the second loop filter to perform a fast calibration by reducing a lock time. The operation of the first loop filter, the operation of the second loop filter, and the opening of the first loop filter are determined by the switching operations of the switching devices. The calibration module adjusts a gain of analog modulation data based on a frequency error accumulated in the first loop filter after the first loop filter is open during the gain calibration operation.
Public/Granted literature
- US20090153254A1 PHASE LOCKED LOOP CIRCUIT PERFORMING TWO POINT MODULATION AND GAIN CALIBRATION METHOD THEREOF Public/Granted day:2009-06-18
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