A pixel structure of a flat panel display for arrangement on a substrate. The pixel structure comprises a storage capacitor, a thin film transistor (TFT) and a data line formed on the substrate. The storage capacitor is disposed on the substrate, comprising a lower metal layer, an upper metal layer and a capacitor dielectric layer disposed therebetween. The TFT is disposed on the substrate and electrically connected to the storage capacitor, comprising an active layer, a gate electrode, and a gate dielectric layer disposed therebetween. The data line is disposed on the substrate, electrically connected to the thin film transistor and insulated from the substrate. The upper metal layer and the gate electrode are formed by the same metal layer and the lower metal layer and the data line are formed by the same metal layer. The invention also discloses a method for fabricating the pixel structure.