Embodiments of the present disclosure provide a memory element, a method of constructing a memory element, a method of operating a memory cell, an SRAM cell and an integrated circuit. In one embodiment, the memory element includes a pair of cross-connected CMOS inverters having first and second storage nodes. Additionally, the memory element also includes a capacitive component connected between the first and second storage nodes and configured to provide a supplemental capacitance to extend a read signal for sensing a memory state of the inverters.