Invention Grant
- Patent Title: Method, apparatus, and system for erasing memory
- Patent Title (中): 擦除存储器的方法,设备和系统
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Application No.: US11950609Application Date: 2007-12-05
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Publication No.: US07755940B2Publication Date: 2010-07-13
- Inventor: Seiichi Aritome
- Applicant: Seiichi Aritome
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman, Lundberg & Woessner, P.A.
- Main IPC: G11C16/04
- IPC: G11C16/04

Abstract:
Methods, apparatus, and systems may operate such as to perform a pre-programming operation on a plurality of multiple level memory cells of a memory device. One such pre-programming operation involves applying a series of voltage pulses to the plurality of multiple level memory cells, verifying a charge stored in the plurality of multiple level memory cells, and erasing the plurality of multiple level memory cells of the memory block based on a result from verifying the charge stored in the plurality of multiple level memory cells.
Public/Granted literature
- US20090147572A1 METHOD, APPARATUS, AND SYSTEM FOR ERASING MEMORY Public/Granted day:2009-06-11
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