A semiconductor memory device is capable of reading data at a high speed, without using a reference cell transistor. The semiconductor memory device includes a sensing unit including first cross-coupled MOS transistors to sense and amplify a voltage difference between a first node and a second node, and a unit cell including second cross-coupled cell MOS transistors to latch data and output a first signal and a second signal corresponding to the latched data to the first node and the second node, respectively.