Invention Grant
US07755959B2 Semiconductor memory device with reduced number of channels for test operation
有权
具有减少通道数量的半导体存储器件用于测试操作
- Patent Title: Semiconductor memory device with reduced number of channels for test operation
- Patent Title (中): 具有减少通道数量的半导体存储器件用于测试操作
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Application No.: US12005441Application Date: 2007-12-26
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Publication No.: US07755959B2Publication Date: 2010-07-13
- Inventor: Ki-Chang Kwean
- Applicant: Ki-Chang Kwean
- Applicant Address: KR Kyoungki-do
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Kyoungki-do
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Priority: KR10-2007-0055965 20070608
- Main IPC: G11C29/00
- IPC: G11C29/00
Abstract:
A semiconductor memory device includes a plurality of memory banks, a data pin for inputting and outputting data, and input/output buffers connected to the data pin. Each of the memory banks has a plurality of memory cells for storing the data. The data pin is enabled and disabled by a pin selection signal. The data pin performs a normal data input/output operation when the pin selection signal is enabled and a termination resistor connected to the data pin is off when the pin selection signal is disabled. The input/output buffers make a termination resistor connected to the data pin off when the pin selection signal is disabled.
Public/Granted literature
- US20080304345A1 Semiconductor memory device with reduced number of channels for test operation Public/Granted day:2008-12-11
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