Invention Grant
US07756148B1 Multi-threaded FIFO memory generator with speculative read and write capability
有权
具有推测读写能力的多线程FIFO存储器
- Patent Title: Multi-threaded FIFO memory generator with speculative read and write capability
- Patent Title (中): 具有推测读写能力的多线程FIFO存储器
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Application No.: US11760699Application Date: 2007-06-08
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Publication No.: US07756148B1Publication Date: 2010-07-13
- Inventor: Marcio T. Oliveira , Robert A. Alfieri
- Applicant: Marcio T. Oliveira , Robert A. Alfieri
- Applicant Address: US CA Santa Clara
- Assignee: NVIDIA Corporation
- Current Assignee: NVIDIA Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Patterson & Sheridan, LLP
- Main IPC: H04L12/28
- IPC: H04L12/28

Abstract:
Systems and methods for generating synthesizable code representing first-in first-out (FIFO) memories may be used to produce FIFO memories for multi-threaded processing. A single FIFO memory is shared between the threads to conserve die area, however each thread may be executed independently, as if each thread has a dedicated FIFO memory. A synthesizable code generator produces synthesizable code for a sender interface, storage, receiver interface, and other features that are specified by a programmer. The other features may reduce power consumption or improve timing. The code generator is used to efficiently produce different variations of FIFO memories.
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