Invention Grant
US07772038B2 CMOS process for fabrication of ultra small or non standard size or shape semiconductor die
有权
用于制造超小型或非标准尺寸或形状半导体管芯的CMOS工艺
- Patent Title: CMOS process for fabrication of ultra small or non standard size or shape semiconductor die
- Patent Title (中): 用于制造超小型或非标准尺寸或形状半导体管芯的CMOS工艺
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Application No.: US11919046Application Date: 2006-06-23
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Publication No.: US07772038B2Publication Date: 2010-08-10
- Inventor: Daniel Carothers
- Applicant: Daniel Carothers
- Applicant Address: US NH Peterborough
- Assignee: Retro Reflective Optics, LLC
- Current Assignee: Retro Reflective Optics, LLC
- Current Assignee Address: US NH Peterborough
- International Application: PCT/US2006/024630 WO 20060623
- International Announcement: WO2007/040688 WO 20070412
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L21/302 ; H01L21/461

Abstract:
A method for the singulation of integrated circuit die, the method including: etching a semiconductor layer disposed on a silicon oxide dielectric layer, thereby forming a trench defining a boundary of the die; depositing a silicon nitride layer in the trench; coating the semiconductor layer with an oxide layer such that the trench is filled; removing part of the oxide layer from the semiconductor layer such that the oxide layer only remains in the trench; mounting the semiconductor layer to a carrier; removing the silicon oxide dialectic layer, the nitride layer, and the oxide layer; and releasing the die from the carrier. The method is suitable for irregularly shaped or extremely small die and is compatible with traditional CMOS processes.
Public/Granted literature
- US20090298231A1 Cmos process for fabrication of ultra small or non standard size or shape semiconductor die Public/Granted day:2009-12-03
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