Invention Grant
US07772059B2 Method for fabricating graphene transistors on a silicon or SOI substrate
有权
在硅或SOI衬底上制造石墨烯晶体管的方法
- Patent Title: Method for fabricating graphene transistors on a silicon or SOI substrate
- Patent Title (中): 在硅或SOI衬底上制造石墨烯晶体管的方法
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Application No.: US12015358Application Date: 2008-01-16
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Publication No.: US07772059B2Publication Date: 2010-08-10
- Inventor: Ashesh Parikh , Andrew Marshall
- Applicant: Ashesh Parikh , Andrew Marshall
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Jacqueline J. Garner; Wade J. Brady, III; Frederick J. Telecky, Jr.
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L21/8234

Abstract:
A method of fabricating graphene transistors, comprising providing an SOI substrate, performing an optional threshold implant on the SOI substrate, forming an upper silicon layer mesa island, carbonizing the silicon layer into SiC utilizing a gaseous source, converting the SiC into graphene, forming source/drain regions on opposite longitudinal ends of the graphene, forming gate oxide between the source/drain regions on the graphene, forming gate material over the gate oxide, creating a transistor edge, depositing dielectric onto the transistor edge and performing back end processing.
Public/Granted literature
- US20090181502A1 METHOD FOR FABRICATING GRAPHENE TRANSISTORS ON A SILICON OR SOI SUBSTRATE Public/Granted day:2009-07-16
Information query
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