Semiconductor integrated circuit device and dummy pattern arrangement method

Invention Grant

US07772070B2 Semiconductor integrated circuit device and dummy pattern arrangement method 失效

Title translation: 半导体集成电路器件和虚拟图案布置方法

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Patent Title: Semiconductor integrated circuit device and dummy pattern arrangement method
Patent Title (中): 半导体集成电路器件和虚拟图案布置方法
Application No.: US11711783

Application Date: 2007-02-28
Publication No.: US07772070B2

Publication Date: 2010-08-10
Inventor: Hiroyasu Kitajima , Hiroshi Furuta , Toshikatsu Jinbo
Applicant: Hiroyasu Kitajima , Hiroshi Furuta , Toshikatsu Jinbo
Applicant Address: JP Kanagawa
Assignee: NEC Electronics Corporation
Current Assignee: NEC Electronics Corporation
Current Assignee Address: JP Kanagawa
Agency: Foley & Lardner LLP
Priority: JP2006-070203 20060315
Main IPC: H01L21/8234
IPC: H01L21/8234

Semiconductor integrated circuit device and dummy pattern arrangement method

Abstract:

A semiconductor integrated circuit device according to an embodiment of the present invention includes a functional circuit region including a functional circuit, a dummy region formed in a region other than the functional circuit region, and plural dummy MOSFETs formed in a dummy region and having a dummy gate electrode on a dummy diffusion layer, the plural dummy MOSFETs being arranged such that date rates of the dummy diffusion layer and dummy gate electrode are kept constant in a predetermined section.

Abstract(Chinese):

根据本发明实施例的半导体集成电路器件包括功能电路区域，该功能电路区域包括功能电路，在功能电路区域以外的区域中形成的虚拟区域，以及形成在虚拟区域中并具有虚拟区域的多个虚设MOSFET 在虚拟扩散层上形成栅电极，所述多个虚设MOSFET被配置为使得在预定部分中虚拟扩散层和伪栅电极的日期速率保持恒定。

Public/Granted literature

US20070221957A1 Semiconductor integrated circuit device and dummy pattern arrangement method Public/Granted day:2007-09-27

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822	.....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232	......场效应工艺
H01L21/8234	.......MIS工艺