Invention Grant
- Patent Title: Strained channel transistor and method of fabrication thereof
- Patent Title (中): 应变通道晶体管及其制造方法
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Application No.: US11383951Application Date: 2006-05-17
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Publication No.: US07772071B2Publication Date: 2010-08-10
- Inventor: Yung Fu Chong , Zhijiong Luo , Judson Holt
- Applicant: Yung Fu Chong , Zhijiong Luo , Judson Holt
- Applicant Address: SG Singapore US NY Armonk
- Assignee: Chartered Semiconductor Manufacturing Ltd.,International Business Machines Corporation
- Current Assignee: Chartered Semiconductor Manufacturing Ltd.,International Business Machines Corporation
- Current Assignee Address: SG Singapore US NY Armonk
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
The present invention relates to semiconductor integrated circuits. More particularly, but not exclusively, the invention relates to strained channel complimentary metal oxide semiconductor (CMOS) transistor structures and fabrication methods thereof. A strained channel CMOS transistor structure comprises a source stressor region comprising a source extension stressor region; and a drain stressor region comprising a drain extension stressor region; wherein a strained channel region is formed between the source extension stressor region and the drain extension stressor region, a width of said channel region being defined by adjacent ends of said extension stressor regions.
Public/Granted literature
- US20070267703A1 STRAINED CHANNEL TRANSISTOR AND METHOD OF FABRICATION THEREOF Public/Granted day:2007-11-22
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