Invention Grant
US07772076B2 Method of manufacturing semiconductor device using dummy gate wiring layer
失效
使用伪栅极布线层制造半导体器件的方法
- Patent Title: Method of manufacturing semiconductor device using dummy gate wiring layer
- Patent Title (中): 使用伪栅极布线层制造半导体器件的方法
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Application No.: US11715965Application Date: 2007-03-09
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Publication No.: US07772076B2Publication Date: 2010-08-10
- Inventor: Atsushi Yagishita , Kouji Matsuo , Yasushi Akasaka , Kyoichi Suguro , Yoshitaka Tsunashima
- Applicant: Atsushi Yagishita , Kouji Matsuo , Yasushi Akasaka , Kyoichi Suguro , Yoshitaka Tsunashima
- Applicant Address: JP Kawasaki-shi
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Kawasaki-shi
- Agency: Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P.
- Priority: JP9-174195 19970630
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
A method of manufacturing a semiconductor device includes forming a dummy gate wiring layer having a side surface and an upper surface on a first area of one major surface of a substrate, the major surface of the substrate including the first area and a second area, thereafter, forming a semiconductor film on the second area of the major surface of the substrate by using epitaxial growth, the semiconductor film having a thickness smaller than a thickness of the dummy gate wiring layer, and forming, on the semiconductor film, a gate sidewall which is made of an insulator and covers the side surface of the dummy gate wiring layer.
Public/Granted literature
- US20070172997A1 Semiconductor device and method of manufacturing the same Public/Granted day:2007-07-26
Information query
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