Invention Grant
- Patent Title: Process for high voltage superjunction termination
- Patent Title (中): 高压超连接端接工艺
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Application No.: US12053067Application Date: 2008-03-21
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Publication No.: US07772086B2Publication Date: 2010-08-10
- Inventor: Fwu-Iuan Hshieh , Brian D. Pratt
- Applicant: Fwu-Iuan Hshieh , Brian D. Pratt
- Applicant Address: US AZ Tempe
- Assignee: Third Dimension (3D) Semiconductor, Inc.
- Current Assignee: Third Dimension (3D) Semiconductor, Inc.
- Current Assignee Address: US AZ Tempe
- Agency: Panitch Schwarze Belisario & Nadel LLP
- Main IPC: H01L21/30
- IPC: H01L21/30 ; H01L21/46

Abstract:
A method of manufacturing a semiconductor device having an active region and a termination region includes providing a semiconductor substrate having first and second main surfaces opposite to each other. The semiconductor substrate has an active region and a termination region surrounding the active region. The first main surface is oxidized. A first plurality of trenches and a first plurality of mesas are formed in the termination region. The first plurality of trenches in the termination region are filled with a dielectric material. A second plurality of trenches in the termination region. The second plurality of trenches are with the dielectric material.
Public/Granted literature
- US20080164521A1 PROCESS FOR HIGH VOLTAGE SUPERJUNCTION TERMINATION Public/Granted day:2008-07-10
Information query
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