Invention Grant
US07772643B2 Methods of fabricating semiconductor device having a metal gate pattern
有权
制造具有金属栅极图案的半导体器件的方法
- Patent Title: Methods of fabricating semiconductor device having a metal gate pattern
- Patent Title (中): 制造具有金属栅极图案的半导体器件的方法
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Application No.: US12457323Application Date: 2009-06-08
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Publication No.: US07772643B2Publication Date: 2010-08-10
- Inventor: Ja-Hum Ku , Chang-Won Lee , Seong-Jun Heo , Sun-Pil Youn , Sung-Man Kim
- Applicant: Ja-Hum Ku , Chang-Won Lee , Seong-Jun Heo , Sun-Pil Youn , Sung-Man Kim
- Applicant Address: KR Yeongtong-gu, Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Yeongtong-gu, Suwon-si, Gyeonggi-do
- Agency: Muir Patent Consulting, PLLC
- Main IPC: H01L29/94
- IPC: H01L29/94 ; H01L29/78

Abstract:
A method of fabricating a semiconductor device having a metal gate pattern is provided in which capping layers are used to control the relative oxidation rates of portions of the metal gate pattern during a oxidation process. The capping layer may be a multilayer structure and may be etched to form insulating spacers on the sidewalls of the metal gate pattern. The capping layer(s) allow the use of a selective oxidation process, which may be a wet oxidation process utilizing partial pressures of both H2O and H2 in an H2-rich atmosphere, to oxidize portions of the substrate and metal gate pattern while suppressing the oxidation of metal layers that may be included in the metal gate pattern. This allows etch damage to the silicon substrate and edges of the metal gate pattern to be reduced while substantially maintaining the original thickness of the gate insulating layer and the conductivity of the metal layer(s).
Public/Granted literature
- US20090250752A1 Methods of fabricating semiconductor device having a metal gate pattern Public/Granted day:2009-10-08
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