Invention Grant
US07773006B2 Systems and methods of parallel to serial conversion 有权
与串行转换并行的系统和方法

Systems and methods of parallel to serial conversion
Abstract:
A system and method for using one or more clock signals is disclosed. The system includes a clock translator that has a first input to receive a first reference clock signal and a second input to receive a second reference clock signal. The clock translator also includes an output to provide a bit rate clock signal having a clock frequency in a first ratio with respect to the frequency of the first reference clock but having a resolution based on at least a portion of the second reference clock signal. The second reference clock has a faster rate than the first reference clock.
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