Invention Grant
US07773230B2 Interferometric condition assessment system for a microelectronic structure including a semiconductor or free-metal material 有权
包括半导体或自由金属材料的微电子结构的干涉条件评估系统

  • Patent Title: Interferometric condition assessment system for a microelectronic structure including a semiconductor or free-metal material
  • Patent Title (中): 包括半导体或自由金属材料的微电子结构的干涉条件评估系统
  • Application No.: US12172629
    Application Date: 2008-07-14
  • Publication No.: US07773230B2
    Publication Date: 2010-08-10
  • Inventor: Paul Pfaff
  • Applicant: Paul Pfaff
  • Applicant Address: US OR Lake Oswego
  • Assignee: Attofemto, Inc.
  • Current Assignee: Attofemto, Inc.
  • Current Assignee Address: US OR Lake Oswego
  • Agency: Davis Wright Tremaine LLP
  • Agent George C. Rondeau, Jr.
  • Main IPC: G01B9/02
  • IPC: G01B9/02 G01B9/021
Interferometric condition assessment system for a microelectronic structure including a semiconductor or free-metal material
Abstract:
An improved condition testing system and method includes a structure including a semiconductor material with a target portion and a second portion. The target portion has a first feature when at least one of the following occurs: an external force is received by the second portion of the structure and an internal condition occurs in the target portion. The system and method further has a interferogram shaped and located to produce a first optical interference pattern when the target portion and the interferogram are exposed to non-invasive illumination and when the target portion has the first feature. Further implementations use a second test interferogram spaced apart from the first test interferogram.
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