Invention Grant
- Patent Title: Multi-channel data detection phase locked loop frequency error combination logic
- Patent Title (中): 多通道数据检测锁相环频率误差组合逻辑
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Application No.: US11870921Application Date: 2007-10-11
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Publication No.: US07773327B2Publication Date: 2010-08-10
- Inventor: Robert Allen Hutchins , Jens Jelitto , Sedat Oelcer
- Applicant: Robert Allen Hutchins , Jens Jelitto , Sedat Oelcer
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent John H. Holcombe
- Main IPC: G11B5/09
- IPC: G11B5/09
Abstract:
Frequency error combination for a multi-channel data detection system with a phase locked loop for each channel, comprises receiving frequency error information with respect to each channel; combination logic configured to combine the received frequency error information and generate a combined phase error, weighting the received frequency error information from each channel; and a frequency error output configured to apply the combined frequency error to at least one channel phase locked loop.
Public/Granted literature
- US20090097536A1 MULTI-CHANNEL DATA DETECTION PHASE LOCKED LOOP FREQUENCY ERROR COMBINATION LOGIC Public/Granted day:2009-04-16
Information query
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