Invention Grant
US07773403B2 Spacer patterns using assist layer for high density semiconductor devices
有权
使用辅助层的高密度半导体器件的间隔图案
- Patent Title: Spacer patterns using assist layer for high density semiconductor devices
- Patent Title (中): 使用辅助层的高密度半导体器件的间隔图案
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Application No.: US11623315Application Date: 2007-01-15
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Publication No.: US07773403B2Publication Date: 2010-08-10
- Inventor: James Kai , George Matamis , Tuan Duc Pham , Masaaki Higashitani , Takashi Orimoto
- Applicant: James Kai , George Matamis , Tuan Duc Pham , Masaaki Higashitani , Takashi Orimoto
- Applicant Address: US CA Milpitas
- Assignee: SanDisk Corporation
- Current Assignee: SanDisk Corporation
- Current Assignee Address: US CA Milpitas
- Agency: Vierra Magen Marcus & DeNiro LLP
- Main IPC: G11C5/06
- IPC: G11C5/06

Abstract:
High density semiconductor devices and methods of fabricating the same are provided. Spacer fabrication techniques are utilized to form circuit elements having reduced feature sizes, which in some instances are smaller than the smallest lithographically resolvable element size of the process being used. Spacers are formed that serve as a mask for etching one or more layers beneath the spacers. An etch stop pad layer having a material composition substantially similar to the spacer material is provided between a dielectric layer and an insulating sacrificial layer such as silicon nitride. When etching the sacrificial layer, the matched pad layer provides an etch stop to avoid damaging and reducing the size of the dielectric layer. The matched material compositions further provide improved adhesion for the spacers, thereby improving the rigidity and integrity of the spacers.
Public/Granted literature
- US20080169567A1 Spacer Patterns Using Assist Layer for High Density Semiconductor Devices Public/Granted day:2008-07-17
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