Invention Grant
- Patent Title: Processing device, failure recovery method therefor, and failure restoration method
- Patent Title (中): 处理装置，故障恢复方法和故障恢复方法
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Application No.: US11365995Application Date: 2006-03-02
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Publication No.: US07774532B2Publication Date: 2010-08-10
- Inventor: Shinya Yamazaki
- Applicant: Shinya Yamazaki
- Applicant Address: JP Tokyo
- Assignee: NEC Corporation
- Current Assignee: NEC Corporation
- Current Assignee Address: JP Tokyo
- Agency: Foley & Lardner LLP
- Priority: JP2005-058981 20050303; JP2006-031099 20060208
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F3/00 ; G06F5/00 ; G06F13/00
Abstract:
A processing device includes a processor which executes first and second pieces of control software in a memory to perform processing, and a device 1 having a plurality of SLOTs 1 to 8 to electrically connect the processor to a plurality of device. The device 1 switches a SLOT which connects devices 2 and 3 between a SLOT 1 or 2 and a spare SLOT 8 allocated in advance through a switch. The processor executes the first and second pieces of control software to manage SLOT information including pieces of path information obtained through the SLOTs 1, 2, and 8 between the devices 1 and 2 such that the SLOT information can be registered and updated. When a failure occurs in the SLOT 1 or 2, the processor updates the path information obtained through the SLOT 1 into the path information obtained through the spare SLOT, and the SLOT which connects the devices 2 and 3 is switched from the SLOT 1 or 2 to the spare SLOT 8.
Public/Granted literature
- US20060198314A1 Processing device, failure recovery method therefor, and failure restoration method Public/Granted day:2006-09-07
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