Invention Grant
US07774535B2 Memory system and memory device 失效
内存系统和内存设备

Memory system and memory device
Abstract:
According to one embodiment, a first memory device is configured to receive write data from a controller and transmit read data to the controller via a first data pin included in the first memory device. The second memory device is configured to receive write data from the controller and transmit read data to the controller via a second data pin included in the second memory device. A redelivery module within the first memory device is configured to receive an address and a command output from the controller via a predetermined signal line, and output the address and the command to the second memory device via remaining first data pin.
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