Invention Grant
US07774653B2 Method to secure an electronic assembly executing any algorithm against attacks by error introduction
失效
确保执行任何算法的电子组件的方法,以防止错误引入的攻击
- Patent Title: Method to secure an electronic assembly executing any algorithm against attacks by error introduction
- Patent Title (中): 确保执行任何算法的电子组件的方法,以防止错误引入的攻击
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Application No.: US10549793Application Date: 2004-03-17
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Publication No.: US07774653B2Publication Date: 2010-08-10
- Inventor: Mehdi-Laurent Akkar , Louis Goubin , Olivier Thanh-Khiet Ly
- Applicant: Mehdi-Laurent Akkar , Louis Goubin , Olivier Thanh-Khiet Ly
- Applicant Address: FR Meudon
- Assignee: Gemalto SA
- Current Assignee: Gemalto SA
- Current Assignee Address: FR Meudon
- Agency: The Jansson Firm
- Agent Pehr B. Jansson
- Priority: EP03290688 20030318
- International Application: PCT/IB2004/000776 WO 20040317
- International Announcement: WO2004/084073 WO 20040930
- Main IPC: G06F11/00
- IPC: G06F11/00

Abstract:
The invention concerns an automatic method to secure an electronic calculation assembly against attacks by error introduction or by radiation. The following are used: 1) Static information generated by the automatic process; 2) A dynamic part of the memory of the electronic system allocated by the automatic process; 3) Beacons and check points to mark out the code, introduced by the automatic process; 4) Beacon functions storing information in the dynamic memory; 5) History verification functions using the static information and the dynamic memory to check that no errors have been introduced.
Public/Granted literature
- US20060282741A1 Method to secure an electronic assembly executing any algorithm against attacks by error introduction Public/Granted day:2006-12-14
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