Invention Grant
- Patent Title: Analyzer
- Patent Title (中): 分析仪
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Application No.: US11866595Application Date: 2007-10-03
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Publication No.: US07774666B2Publication Date: 2010-08-10
- Inventor: Makoto Kawamura , Yutaka Ochi , Yasunaga Iseda , Hiroshi Yamaguchi
- Applicant: Makoto Kawamura , Yutaka Ochi , Yasunaga Iseda , Hiroshi Yamaguchi
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: Greenblum & Bernstein, P.L.C.
- Priority: JP2006-273964 20061005
- Main IPC: G01R31/28
- IPC: G01R31/28 ; G06F11/00

Abstract:
The analyzer according to the present invention is an analyzer having a scan test function, and including scan paths each having flip-flops which function as a shift register when a scan test is performed, and a switching unit operable to switch between a first connection state, and a second connection state where the scan paths are connected in series to each other and further an output from the last stage of the scan path is connected to the input of the first stage of the scan path.
Public/Granted literature
- US20080086666A1 ANALYZER Public/Granted day:2008-04-10
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