The invention relates to a decoding device particularly adapted to decode a digital input signal (E) in a transmission system using direct sequence spread spectrum, this digital input signal (E) being composed of symbols, each symbol representing a bit satisfying a Barker code, and comprising several symbol elements.This device comprises several finite response filters (FLT1 to FLT4) each of which receives the digital input signal (E), a clock circuit (CLK_GEN) outputting clock signals (CLK1 to CLK4) to the filters with a frequency equal to the frequency at which symbol elements are produced and uniformly distributed phase shifts, and an analysis circuit (ANL) designed to identify which of the filters is best tuned to the input signal (E) and to control the clock circuit to make it generated a clock signal (CLK5) optimised for decoding and an analysis circuit.