Invention Grant
US07781250B2 Wafer level chip size package for MEMS devices and method for fabricating the same
有权
用于MEMS器件的晶片级芯片尺寸封装及其制造方法
- Patent Title: Wafer level chip size package for MEMS devices and method for fabricating the same
- Patent Title (中): 用于MEMS器件的晶片级芯片尺寸封装及其制造方法
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Application No.: US12132641Application Date: 2008-06-04
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Publication No.: US07781250B2Publication Date: 2010-08-24
- Inventor: Zhiqi Wang , Guoqing Yu , Qinqin Xu , Wei Wang
- Applicant: Zhiqi Wang , Guoqing Yu , Qinqin Xu , Wei Wang
- Applicant Address: CN Suzhou Industrial Park
- Assignee: China Wafer Level CSP Ltd.
- Current Assignee: China Wafer Level CSP Ltd.
- Current Assignee Address: CN Suzhou Industrial Park
- Agency: Allen, Dyer, Doppelt, Milbrath & Gilchrist, P.A.
- Priority: CN200710131491 20070831
- Main IPC: H01L21/00
- IPC: H01L21/00
Abstract:
The present invention provides a wafer level chip size package having cavities within which micro-machined parts are free to move, allowing access to electrical contacts, and optimized for device performance. Also a method for fabricating a wafer level chip size package for MEMS devices is disclosed. This packaging method provides a well packed device with the size much closely to the original one, making it possible to package the whole wafer at the same time and therefore, saves the cost and cycle time.
Public/Granted literature
- US20090057868A1 Wafer Level Chip Size Package For MEMS Devices And Method For Fabricating The Same Public/Granted day:2009-03-05
Information query
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