Invention Grant
US07781278B2 CMOS devices having channel regions with a V-shaped trench and hybrid channel orientations, and method for forming the same
失效
具有沟槽区的具有V形沟槽和混合沟道取向的CMOS器件及其形成方法
- Patent Title: CMOS devices having channel regions with a V-shaped trench and hybrid channel orientations, and method for forming the same
- Patent Title (中): 具有沟槽区的具有V形沟槽和混合沟道取向的CMOS器件及其形成方法
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Application No.: US11624387Application Date: 2007-01-18
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Publication No.: US07781278B2Publication Date: 2010-08-24
- Inventor: Huilong Zhu
- Applicant: Huilong Zhu
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Scully, Scott, Murphy & Presser, P.C.
- Main IPC: H01L21/8238
- IPC: H01L21/8238
Abstract:
The present invention relates to a field effect transistor (FET) containing a channel extending perpendicularly across at least one V-shaped trench and along the interior surfaces thereof. In one aspect, a semiconductor device is provided that includes a semiconductor substrate having first and second device regions that are isolated from each other by an isolation region. The first device region has a planar surface with a first crystalline orientation, and the second device region has at least one V-shaped trench which has interior surfaces with a second, different crystalline orientation. A first FET is located at the first device region and contains a channel extending along the planar surface of the first device region. A second, complementary FET is located at the second device region and contains a channel extending perpendicularly across the at least one V-shaped trench and along the interior surfaces thereof.
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