Invention Grant
US07781300B2 Method for producing mixed stacked structures, different insulating areas and/or localised vertical electrical conducting areas
有权
用于制造混合堆叠结构，不同绝缘区域和/或局部垂直导电区域的方法
- Patent Title: Method for producing mixed stacked structures, different insulating areas and/or localised vertical electrical conducting areas
- Patent Title (中): 用于制造混合堆叠结构，不同绝缘区域和/或局部垂直导电区域的方法
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Application No.: US11576743Application Date: 2005-10-06
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Publication No.: US07781300B2Publication Date: 2010-08-24
- Inventor: Hubert Moriceau , Franck Fournel , Christophe Morales
- Applicant: Hubert Moriceau , Franck Fournel , Christophe Morales
- Applicant Address: FR Paris
- Assignee: Commissariat a l'Energie Atomique
- Current Assignee: Commissariat a l'Energie Atomique
- Current Assignee Address: FR Paris
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: FR0452284 20041006
- International Application: PCT/IB2005/054432 WO 20051006
- International Announcement: WO2006/072871 WO 20060713
- Main IPC: H01L21/76
- IPC: H01L21/76
Abstract:
The invention relates to a method for producing a semiconducting structure including: controlled formation, through a mask (31), in a first substrate (30) in a semiconducting material, of at least one first area in an insulating material (36), up to the level of the lower surface (35) of the mask, before or during the removal of the mask.
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