Invention Grant
- Patent Title: Method of manufacturing a semiconductor device with through-chip vias
- Patent Title (中): 制造带通孔的半导体器件的方法
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Application No.: US11808054Application Date: 2007-06-06
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Publication No.: US07781334B2Publication Date: 2010-08-24
- Inventor: Osamu Kato
- Applicant: Osamu Kato
- Applicant Address: JP Tokyo
- Assignee: Oki Semiconductor Co., Ltd.
- Current Assignee: Oki Semiconductor Co., Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Rabin & Berdo, P.C.
- Priority: JP2006-190234 20060711
- Main IPC: H01L21/4763
- IPC: H01L21/4763

Abstract:
An electrode is formed in a hole extending partway into the substrate of a semiconductor device by depositing an insulating film and a barrier metal layer on the substrate surface and the interior of the hole, then filling the hole with a layer of electrode material that also covers the substrate surface. Next, the electrode material exterior to the hole is removed by wet etching, using an etchant that does not etch the barrier metal. The barrier metal exterior to the hole is then removed by wet etching, using an etchant that does not etch the electrode material. This process eliminates the need for expensive chemical mechanical polishing.
Public/Granted literature
- US20080014742A1 Method of manufacturing a semiconductor device with through-chip vias Public/Granted day:2008-01-17
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