Invention Grant
- Patent Title: On die termination circuit and method for calibrating the same
- Patent Title (中): 芯片终端电路及其校准方法
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Application No.: US12149775Application Date: 2008-05-08
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Publication No.: US07782078B2Publication Date: 2010-08-24
- Inventor: Cheul-Hee Koo
- Applicant: Cheul-Hee Koo
- Applicant Address: KR Gyeonggi-do
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: IP & T Law Firm PLC
- Priority: KR10-2007-0046380 20070514
- Main IPC: H03K17/16
- IPC: H03K17/16 ; H03K19/003

Abstract:
On die termination circuit and method for calibrating the same includes a external resistor connected to a first node, a plurality of calibration resistors connected to a second node, the plurality of calibration resistors being turned on/off in response to a calibration code set, a current mirror configured to mirror currents of the first node and the second node and a code generator configured to generate a calibration code set according to the mirrored currents. In accordance with a method for calibrating an on die termination circuit of the present invention, the method includes a step of mirroring a current of a first node connected to an external resistor and a current of a second node connected to a plurality of calibration resistors and a step of generating a calibration code set according to the mirrored currents.
Public/Granted literature
- US20080284467A1 On die termination circuit and method for calibrating the same Public/Granted day:2008-11-20
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