A semiconductor memory device has a simple layout pattern of a sub hole region. The semiconductor memory device includes a segment input/output line, a first local input/output line and a second local input/output line corresponding to the segment input/output line, an input/output switch configured to selectively connect the segment input/output line and the first local input/output line in response to a first switch control signal, and a dummy input/output switch which is connected to a second local input/output line but is not connected to the segment input/output line.